This firmware enumerates the device as an HID-complient device, and then further 'enumerates' as a HID-Mouse (called “MeerMouse” ).
It doesn't appear to work on all machines though, as best I can tell it doesn't work on systems that do not have enhanced device drivers for the hubs loaded. It works fine on my laptop and my housemates machine, just doesn't like my dekstop as best I can tell. Ahh well.
Actually I found a fix for this (taken from my journal, Sun 27 Feb 2005):
The 'D12 has special support built in to it for changing the address value at the correct time.
Issuing the SET ADDRESS ENABLE command (0xD0) to the 'D12 only updates a holding register
The D12 will wait until the appropriate time (right after the zero length packet representing the STATUS phase gets IN'd by the host) before it actually switches from the default address (0) to the new address.
Note that this is the first version of the firmware that uses the parsing/searching appraoch to descriptors.
#include <16f877.h> //-------------------------------------------------------- // Setup PIC and CCS compiler #fuses XT, PUT, NOWDT, NOPROTECT #use delay(clock = 4000000) #use rs232(baud = 19200, xmit = PIN_C4, rcv = PIN_C5, disable_ints) // By using C6 and C7, we will make use of the 877's hardware USART abilities #use fast_io(a) #use standard_io(c) #byte port_a = 5 set_tris_a(0xFF); // All input #use standard_io(b) #byte port_d = 8 //-------------------------------------------------------- // Debug options // 0 is most verbose, 1 less so etc // Comment out the following line to bulid without debugging // NB: This creates a LOT of warnings during compilation: // a "Code has no effect" for each DEBUGx statement #define __DEBUGGING_ENABLED #ifdef __DEBUGGING_ENABLED #define DEBUG0 if(DEBUG_LEVEL <= 0)DEBUGGED=1; if(DEBUG_LEVEL <= 0)printf #define DEBUG1 if(DEBUG_LEVEL <= 1)DEBUGGED=1; if(DEBUG_LEVEL <= 1)printf #define DEBUG2 if(DEBUG_LEVEL <= 2)DEBUGGED=1; if(DEBUG_LEVEL <= 2)printf #define DEBUG3 if(DEBUG_LEVEL <= 3)DEBUGGED=1; if(DEBUG_LEVEL <= 3)printf #define DEBUG4 if(DEBUG_LEVEL <= 4)DEBUGGED=1; if(DEBUG_LEVEL <= 4)printf #define DEBUG5 if(DEBUG_LEVEL <= 5)DEBUGGED=1; if(DEBUG_LEVEL <= 5)printf #define DEBUG6 if(DEBUG_LEVEL <= 6)DEBUGGED=1; if(DEBUG_LEVEL <= 6)printf #define DEBUG7 if(DEBUG_LEVEL <= 7)DEBUGGED=1; if(DEBUG_LEVEL <= 7)printf #else #define DEBUG0 #define DEBUG1 #define DEBUG2 #define DEBUG3 #define DEBUG4 #define DEBUG5 #define DEBUG6 #define DEBUG7 #endif //-------------------------------------------------------- // Definitions // Yellow LED #define LED_N PIN_B7 // Constants #define ON 1 #define OFF 0 #define D12_DATA 0 #define D12_COMMAND 1 // D12 pins #define D12_A0 PIN_B6 #define D12_WR_N PIN_B2 #define D12_RD_N PIN_B1 #define D12_SUSPEND PIN_B4 #define D12_INT_N PIN_B0 // D12 Constants #define D12_CTRL_BUFFER_SIZE 16 // (Bytes) // D12 Endpoint indexes (for bitwise OR'ing with base commands) #define CTRL_OUT 0 #define CTRL_IN 1 #define ENDPT1_OUT 2 #define ENDPT1_IN 3 #define ENDPT2_OUT 4 #define ENDPT2_IN 5 // D12 Commands #define SET_ADDRESS 0xD0 #define SET_ENDPT_ENABLE 0xD8 #define SET_MODE 0xF3 #define SET_DMA 0xFB #define READ_INT 0xF4 #define SELECT_ENDPT 0x00 // + endpoint index #define READ_ENDPT_STATUS 0x40 // + endpoint index #define READ_BUFFER 0xF0 #define WRITE_BUFFER 0xF0 #define SET_ENDPT_STATUS 0x40 // + endpoint index #define ACK_SETUP 0xF1 #define CLEAR_BUFFER 0xF2 #define VALIDATE_BUFFER 0xFA #define SEND_RESUME 0xF6 #define READ_FRAME_NUM 0xF5 // D12 Interrupt byte 1 #define INT_CTRL_OUT 0x01 // bit 0 #define INT_CTRL_IN 0x02 // bit 1 #define INT_ENDPT1_OUT 0x04 // bit 2 #define INT_ENDPT1_IN 0x08 // bit 3 #define INT_ENDPT2_OUT 0x10 // bit 4 #define INT_ENDPT2_IN 0x20 // bit 5 #define INT_BUS_RESET 0x40 // bit 6 #define INT_SUSPEND_CHANGE 0x80 // bit 7 // D12 Interrupt byte 2 #define DMA_EOT_INT 0x01 // bit 0 // D12 Last transaction status #define STAT_XFER_SUCCESS 0x01 // bit 0 (1=Success) #define STAT_ERROR 0x1E // bits 1-4 #define STAT_SETUP 0x20 // bit 5 (1=Last packet has setup token) #define STAT_DATA 0x40 // bit 6 (0/1 to indicate DATA0 / DATA1 tag of packet) #define STAT_NOT_READ 0x80 // bit 7 (1=Previous status not read (i.e. missed)) // USB bmRequestTypes #define REQTYPE_XFER_DIRECTION 0x80 // 0=OUT (Host to device), 1=IN (Device to host) #define REQTYPE_CMD_TYPE 0x60 // 0=Standard 1=Class 3=Vendor #define REQTYPE_RECIPIENT 0x1F // 0=Device, 1=Interface, 2=Endpoint, 3=Other // USB Standard request types #define GET_STATUS_REQ 0x00 #define CLEAR_FEATURE_REQ 0x01 #define SET_FEATURE_REQ 0x03 #define SET_ADDRESS_REQ 0x05 #define GET_DESCRIPTOR_REQ 0x06 #define SET_DESCRIPTOR_REQ 0x07 #define GET_CONFIGURATION_REQ 0x08 #define SET_CONFIGURATION_REQ 0x09 #define GET_INTERFACE_REQ 0x0A #define SET_INTERFACE_REQ 0x0B #define SYNCH_FRAME_REQ 0x0C // STATE #define STATE_DEFAULT 0x00 #define STATE_ADDRESSED 0x01 #define STATE_CONFIGURED 0x02 //-------------------------------------------------------- // Global Variable Declarations short DEBUGGED; // Flags if a DEBUGx statement was executed short CTRL_IN_BUSY; // Used to determine if D12 CTRL_IN interrupt is because the buffer was (successfully) sent unsigned char DEBUG_LEVEL; // Set by DIP switches on power up, and determines how verbose debugging is, via DEBUGx statements unsigned char LOAD_OFFSET; // Used when sending descriptors unsigned int16 LOAD_LENGTH; unsigned char SET_ADDRESS_PENDING; // Flags the next CTRL_IN handler to send a null packet and then change the D12 address unsigned char CONFIGURATION; // Indicates the selected configuration unsigned char STATE; // USB device state. One of {Default, Addressed, Configured} unsigned char ADDRESS; // Current device address on USB bus //-------------------------------------------------------- // Structures and Enumerations struct REQUEST { int8 bmRequestType; int8 bRequest; int16 wValue; int16 wIndex; int16 wLength; // Data Phase's data length }; struct { int8 IDLE_TIME; } *HID; struct { int8 x; int8 y; short a; short b; } *MOUSE; //-------------------------------------------------------- // USB Descriptors // Constants are stored in ROM, and hence cannot be accessed via pointers. // Instead of having to duplicate code for each descriptor, we instead // store them in a large block and 'parse' this block when a descriptor // is requested. unsigned char const DESCRIPTORS[] = { 0x12, //BYTE bLength 0x01, //BYTE bDescriptorType 0x10, //WORD (Lo) bcdUSB version supported 0x01, //WORD (Hi) bcdUSB version supported 0x00, //BYTE bDeviceClass 0x00, //BYTE bDeviceSubClass 0x00, //BYTE bDeviceProtocol D12_CTRL_BUFFER_SIZE, //BYTE bMaxPacketSize (probably 16) 0xC7, //WORD (Lo) idVendor 0x05, //WORD (Hi) idVendor 0x13, //WORD (Lo) idProduct, For Philips Hub mouse 0x01, //WORD (Hi) idProduct, For Philips Hub mouse 0x01, //WORD (Lo) bcdDevice 0x00, //WORD (Hi) bcdDevice 0x01, //BYTE iManufacturer 0x02, //BYTE iProduct 0x03, //BYTE iSerialNumber 0x01 //BYTE bNumConfigurations // Configuration & associated subdescriptors // Configuration 0x09, //BYTE bLength (Configuration descriptor) 0x02, //BYTE bDescriptorType //Assigned by USB 0x22, //WORD (Lo) wTotalLength 0x00, //WORD (Hi) wTotalLength 0x01, //BYTE bNumInterfaces 0x01, //BYTE bConfigurationValue 0x00, //BYTE iConfiguration 0xa0, //BYTE bmAttributes, Bus powered and remote wakeup 0x32, //BYTE MaxPower, 100mA // Interface 0x09, //BYTE bLength (Interface descriptor) 0x04, //BYTE bDescriptionType, assigned by USB 0x00, //BYTE bInterfaceNumber 0x00, //BYTE bAlternateSetting 0x01, //BYTE bNumEndpoints, uses 1 endpoints 0x03, //BYTE bInterfaceClass, HID Class - 0x03 0x01, //BYTE bInterfaceSubClass 0x02, //BYTE bInterfaceProtocol 0x00 //BYTE iInterface // HID 0x09, //BYTE bLength (HID Descriptor) 0x21, //BYTE bDescriptorType 0x10, //WORD (Lo) bcdHID 0x01, //WORD (Hi) bcdHID 0x00, //BYTE bCountryCode 0x01, //BYTE bNumDescriptors 0x22, //BYTE bReportDescriptorType 0x32, //WORD (Lo) wItemLength 0x00, //WORD (Hi) wItemLength // Endpoint 0x07, //BYTE bLength (Endpoint Descriptor) 0x05, //BYTE bDescriptorType, assigned by USB 0x82, //BYTE bEndpointAddress, IN endpoint, endpoint 1 0x03, //BYTE bmAttributes, Interrupt endpoint 0x10, //WORD (Lo) wMaxPacketSize 0x00, //WORD (Hi) wMaxPacketSize 0xFF, //BYTE bInterval // Lang_ID (String0) 0x04, // bLength 0x03, // bDescriptorType = String Desc 0x09, // wLangID (Lo) (Lang ID for English = 0x0409) 0x04, // wLangID (Hi) (Lang ID for English = 0x0409) // String1 30, // bLength 0x03 // bDescriptorType = String Desc // Noting that text is always unicode, hence the 'padding' 'R', 00, 'o', 00, 'b', 00, 'e', 00, 'r', 00, 't', 00, ' ', 00, 'M', 00, 'e', 00, 'e', 00, 'r', 00, 'm', 00, 'a', 00, 'n', 00, // String2 20, // bLength 0x03, // bDescriptorType = String Desc // Noting that text is always unicode, hence the 'padding' 'M', 00, 'e', 00, 'e', 00, 'r', 00, 'M', 00, 'o', 00, 'u', 00, 's', 00, 'e', 00, // String3 30, // bLength 0x03, // bDescriptorType = String Desc // Noting that text is always unicode, hence the 'padding' 'L', 00, 'i', 00, 'm', 00, 'i', 00, 't', 00, 'e', 00, 'd', 00, 'E', 00, 'd', 00, 'i', 00, 't', 00, 'i', 00, 'o', 00, 'n', 00, // Report, NOTE that bLength and bDescriptorType are NOT part of the report descriptor, // and have been addded so that Get_Descriptor() can parse this char array. 52, // bLength (NOT PART OF DESCRIPTOR!) 0x22, // bDescriptorType (NOT PART OF DESCRIPTOR!) // Report descriptor proper 0x05, 0x01, // USAGE_PAGE (Generic Desktop) 0x09, 0x02, // USAGE (Mouse) 0xa1, 0x01, // COLLECTION (Application) 0x09, 0x01, // USAGE (Pointer) 0xa1, 0x00, // COLLECTION (Physical) 0x05, 0x09, // USAGE_PAGE (Button) 0x19, 0x01, // USAGE_MINIMUM (Button 1) 0x29, 0x03, // USAGE_MAXIMUM (Button 3) 0x15, 0x00, // LOGICAL_MINIMUM (0) 0x25, 0x01, // LOGICAL_MAXIMUM (1) 0x95, 0x03, // REPORT_COUNT (3) 0x75, 0x01, // REPORT_SIZE (1) 0x81, 0x02, // INPUT (Data,Var,Abs) 0x95, 0x01, // REPORT_COUNT (1) 0x75, 0x05, // REPORT_SIZE (5) 0x81, 0x01, // INPUT (Cnst,Var,Rel) 0x05, 0x01, // USAGE_PAGE (Generic Desktop) 0x09, 0x30, // USAGE (X) 0x09, 0x31, // USAGE (Y) 0x15, 0x81, // LOGICAL_MINIMUM (-127) 0x25, 0x7f, // LOGICAL_MAXIMUM (127) 0x75, 0x08, // REPORT_SIZE (8) 0x95, 0x02, // REPORT_COUNT (2) 0x81, 0x06, // INPUT (Data,Var,Rel) 0xc0, // END_COLLECTION 0xc0 // END_COLLECTION }; //-------------------------------------------------------- // Function prototypes void Init_PIC(); void Init_D12(); void D12_Write(unsigned char, int); void D12_Read(unsigned char, int); void D12_Interrupt_Handler(); #SEPARATE void D12_Handle_Ctrl_Out_EP(); #SEPARATE void D12_Stall_Endpt(int8); void D12_Standard_Request(struct REQUEST *pReq); void D12_Get_Descriptor(struct REQUEST *pReq); void D12_Send_Null_Packet(int8); void D12_Set_Address(struct REQUEST *pReq); void D12_Set_Configuration(struct REQUEST *pReq); void D12_Class_Request(struct REQUEST *pReq); #SEPARATE void D12_Handle_Ctrl_In_EP(); #SEPARATE char gba_getch(); #SEPARATE void D12_Transaction_Error(int8); #SEPARATE void Debug_D12_Request(struct REQUEST *pReq); void Send_Mouse_Data(); //-------------------------------------------------------- // Entry point void main(void){ DEBUGGED = 0; Init_PIC(); // Put pins in known state, reset D12 etc MOUSE->x = 0; MOUSE->y = 0; MOUSE->a = 0; MOUSE->b = 0; // No need to init the D12, as it will trigger a bus reset interrupt as soon // as it is powered / connects to the USB bus (not too sure which though) if(input(D12_INT_N) == 0) D12_Interrupt_Handler(); // Pre-determined movement, or GBA controlled? if(port_a & 0x08){ // PIN_A3 MOUSE->x = 1; MOUSE->y = 1; MOUSE->a = 0; MOUSE->b = 0; while(TRUE); // Wait for (D12) interrupt } else { #use rs232(baud = 9600, xmit = PIN_C6, rcv = PIN_C7, disable_ints) printf("\r\n GBA Controller enabled! \r\n"); #use rs232(baud = 19200, xmit = PIN_C4, rcv = PIN_C5, disable_ints) enable_interrupts(INT_RDA); // Enable RecieveDataAvailable (hardware USART double buffer has data) while(TRUE); // Wait for (USART / D12) interrupt } } //-------------------------------------------------------- // Used for passing commands or data to the PDIUSBD12 void D12_Write(unsigned char type, int data) { int8 i; switch(type) { case D12_DATA: case D12_COMMAND: set_tris_d(0x00); // Set bus to output mode output_high(D12_RD_N); // Ensure we don't conflict with RD_N if(type == D12_COMMAND) output_high(D12_A0); else output_low(D12_A0); port_d = data; // Setup bus //delay_ms(1); // Data settling time i = 8; while(i--); // Settling time (in PIC cycles) output_low(D12_WR_N); // strobe for at least 20ns output_high(D12_WR_N); if(type == D12_COMMAND) output_low(D12_A0); break; default: DEBUG7("Error in D12_Write(), unknown type: 0x%x!\r\n", type); DEBUG7("Expecting one of:\r\n\t 0x%x\r\n\t0x%x\r\n", D12_COMMAND, D12_DATA); } } //-------------------------------------------------------- // Used for reading data from the PDIUSBD12 void D12_Read(unsigned char* buffer, int reads) { int i; set_tris_d(0xFF); // Set bus to intput mode for(i = 0; i<reads; i++) { output_low(D12_RD_N); buffer[i] = port_d; // Latch in the bus output_high(D12_RD_N); } } //-------------------------------------------------------- // FIXME: Probably want to save some registers when handling // this interrupt, as it takes quite a long time. #INT_EXT void D12_Interrupt_Handler() { unsigned char buffer[2], endpt_int, other_int; // Loop in case another interrupt is triggered while we handle this one while(! input(D12_INT_N)){ // Don't add newlines if we've not sent any data to the terminal if(DEBUGGED == 1)printf("\r\n", DEBUGGED); DEBUGGED = 0; D12_Write(D12_COMMAND, READ_INT); D12_Read(buffer, 2); endpt_int = buffer[0]; other_int = buffer[1]; DEBUG0("IR=%x,%x ", endpt_int, other_int); if (endpt_int & INT_BUS_RESET) { DEBUG7("BR "); // D12 Firmware programming guide recommends using a flag for this... ahh well Init_D12(); // Reset D12 settings (not a chip reset) } else if (endpt_int & INT_SUSPEND_CHANGE) { DEBUG1("SC "); } else if(endpt_int & INT_CTRL_OUT) { // Control Out Endpoint interrupt DEBUG3("CO "); D12_Handle_Ctrl_Out_EP(); } else if (endpt_int & INT_CTRL_IN) { DEBUG3("CI "); D12_Handle_Ctrl_In_EP(); } else if (endpt_int & INT_ENDPT1_OUT){ DEBUG3("1O "); } if (endpt_int & INT_ENDPT1_IN) { DEBUG3("1I "); } else if(endpt_int & INT_ENDPT2_OUT) { DEBUG3("2O "); } else if (endpt_int & INT_ENDPT2_IN) { DEBUG0("2I "); Send_Mouse_Data(); } } } //-------------------------------------------------------- // Setups the hardware at its most basic level void Init_PIC(){ output_low(LED_N); // Turn on the yellow LED set_tris_b(0x01); //PIN_B1 (D12's INT) is input, the rest are output. set_tris_d(0x00); //All output port_d = 0xFF; //Set bus high, useful for checking the ribbon has not come loose output_high(D12_RD_N); output_high(D12_WR_N); output_low(D12_A0); // Indicates bus is for data output_low(D12_SUSPEND); // Prevent D12 from going into suspend disable_interrupts(GLOBAL); // Stop interrupts from interrupting us while we setup ;) ext_int_edge(H_TO_L); // Set up when to trigger enable_interrupts(INT_EXT); // Enable external interrupts (connected to the D12's INT_N) clear_interrupt(INT_EXT); // Remove pending interrupts enable_interrupts(GLOBAL); // Enable all interrupts DEBUG_LEVEL = port_a & 0x07;// Read DIP switches (3 lower digits only) DEBUG7("\r\n\r\n%d ", DEBUG_LEVEL); } //-------------------------------------------------------- // Takes the D12 out of reset and connects it to the USB bus void Init_D12(){ STATE = STATE_DEFAULT; // Revert to default USB state CONFIGURATION = 0; // Unconfigured ADDRESS = 0; // Revert to default address SET_ADDRESS_PENDING = 0; // Is not pending LOAD_OFFSET = 0; // Start at beginning on next request LOAD_LENGTH = 0; // Explicity state there is nothing to send DEBUG0("_SAE "); D12_Write(D12_COMMAND, SET_ADDRESS); D12_Write(D12_DATA, 0x00 | 0x80); DEBUG0("_SEE "); D12_Write(D12_COMMAND, SET_ENDPT_ENABLE); D12_Write(D12_DATA, 0x01); DEBUG0("_SM "); D12_Write(D12_COMMAND, SET_MODE); D12_Write(D12_DATA, 0x16); // Non-ISO, Softconnect, Interrupt for OK, Clock running, no Lazyclock D12_Write(D12_DATA, 0x0B); // Clock 4MHz, Set-to-one isn't, no SOF interrupts } //-------------------------------------------------------- // Check for a SETUP token, and act upon it #SEPARATE void D12_Handle_Ctrl_Out_EP() { unsigned char buffer[2]; unsigned char data[D12_CTRL_BUFFER_SIZE]; struct REQUEST *pReq; // Will be pointed to to data[] when appropriate int i; D12_Write(D12_COMMAND, READ_ENDPT_STATUS + CTRL_OUT); D12_Read(buffer, 1); DEBUG3("LT=%x ", buffer[0]); if(buffer[0] & STAT_NOT_READ){ // Previous status not read // Nothing yet ;) } if(buffer[0] & STAT_XFER_SUCCESS){ if(buffer[0] & STAT_SETUP){ // Setup token D12_Write(D12_COMMAND, SELECT_ENDPT + CTRL_OUT); D12_Read(data, 1); DEBUG2("SE=%x ", data[0]); D12_Write(D12_COMMAND, READ_BUFFER); D12_Read(data, D12_CTRL_BUFFER_SIZE); DEBUG2("DL=%x ", data[1]); // Note that [0] is reserved, so [1] contains the data length // Acknowledge that we like this (NB CTRL_OUT is already selected) D12_Write(D12_COMMAND, ACK_SETUP); D12_Write(D12_COMMAND, CLEAR_BUFFER); // Prevent previous data from being sent (need to ack_setup to re-enable clear buffer) D12_Write(D12_COMMAND, SELECT_ENDPT + CTRL_IN); D12_Write(D12_COMMAND, ACK_SETUP); D12_Write(D12_COMMAND, CLEAR_BUFFER); if(data[1] == 0x08){ // Valid setup token is 8 bytes for(i=2; i<10; i++){ DEBUG0("%x ", data[i]); } pReq = (struct REQUEST *) &data[2]; // [0] is reserved, [1] is data length, so [2] is actual data // Output some debugging info Debug_D12_Request(pReq); switch((pReq->bmRequestType & REQTYPE_CMD_TYPE) >> 5){ // Standard request case 0x00: DEBUG4("SREQ "); D12_Standard_Request(pReq); break; // Class request case 0x01: DEBUG4("CREQ "); D12_Class_Request(pReq); break; // Endpoint request case 0x02: DEBUG4("EREQ "); break; // Unsupported default: DEBUG7("\x07"); // Bell character (^G) DEBUG7("?REQ=%x ", (pReq->bmRequestType & REQTYPE_CMD_TYPE) >> 5); // Stall this endpoint (indicating we cannot handle the request) D12_Stall_Endpt(CTRL_OUT); break; } } else { // Setup token is an invalid length D12_Stall_Endpt(CTRL_OUT); } } } else if (buffer[0] & STAT_ERROR) // Last transaction wasn't successful { D12_Transaction_Error(buffer[0] & STAT_ERROR); } } //-------------------------------------------------------- // Stalls an enpoint, so the D12 will return STALL to the host, // which usually indicates we don't understand / support the host's // request #SEPARATE void D12_Stall_Endpt(int8 ENDPT) { DEBUG7("S_"); switch(ENDPT){ case 0: DEBUG7("CO "); break; case 1: DEBUG7("CI "); break; case 2: DEBUG7("EO "); break; case 3: DEBUG7("EI "); break; case 4: DEBUG7("MO "); break; case 5: DEBUG7("MI "); break; default: DEBUG7("?(%x) ", ENDPT); break; } D12_Write(D12_COMMAND, SET_ENDPT_STATUS + ENDPT); D12_Write(D12_DATA, 0x01); } //-------------------------------------------------------- // Handle standard USB requests, such as those encountered in // SETUP tokens void D12_Standard_Request(struct REQUEST *pReq) { short RequestOK = TRUE; switch(pReq->bRequest){ case GET_STATUS_REQ: DEBUG4("Get_Staus "); if(STATE == STATE_CONFIGURED || (STATE == STATE_ADDRESSED && ADDRESS == 0)){ } else { RequestOK = FALSE; } break; case CLEAR_FEATURE_REQ: DEBUG4("Clear_Feature "); if(STATE == STATE_CONFIGURED || (STATE == STATE_ADDRESSED && ADDRESS == 0)){ } else { RequestOK = FALSE; } break; case SET_FEATURE_REQ: DEBUG4("Set_feature "); if(STATE == STATE_CONFIGURED || (STATE == STATE_ADDRESSED && ADDRESS == 0)){ } else { RequestOK = FALSE; } break; case SET_ADDRESS_REQ: DEBUG4("Set_Address "); if(STATE == STATE_DEFAULT || STATE == STATE_ADDRESSED){ D12_Set_Address(pReq); } else { RequestOK = FALSE; } break; case GET_DESCRIPTOR_REQ: DEBUG4("Get_Descriptor "); if(STATE == STATE_DEFAULT || STATE == STATE_ADDRESSED || STATE == STATE_CONFIGURED){ D12_Get_Descriptor(pReq); } else { RequestOK = FALSE; } break; case SET_DESCRIPTOR_REQ: DEBUG4("Set_Descriptor "); if(STATE == STATE_ADDRESSED || STATE == STATE_CONFIGURED){ } else { RequestOK = FALSE; } break; case GET_CONFIGURATION_REQ: DEBUG4("Get_Configuration "); if(STATE == STATE_ADDRESSED || STATE == STATE_CONFIGURED){ // Returns 0 if in addressed state } else { RequestOK = FALSE; } break; case SET_CONFIGURATION_REQ: DEBUG4("Set_Configuration "); if(STATE == STATE_ADDRESSED || STATE == STATE_CONFIGURED){ D12_Set_Configuration(pReq); } else { RequestOK = FALSE; } break; case GET_INTERFACE_REQ: DEBUG4("Get_Interface "); if(STATE == STATE_CONFIGURED){ } else { RequestOK = FALSE; } break; case SET_INTERFACE_REQ: DEBUG4("Set_Interface "); if(STATE == STATE_CONFIGURED){ } else { RequestOK = FALSE; } break; case SYNCH_FRAME_REQ: DEBUG4("Synch_Frame "); if(STATE == STATE_CONFIGURED){ } else { RequestOK = FALSE; } break; default: RequestOK = FALSE; DEBUG7("\x07"); // Bell character (^G) DEBUG7("?SREQ=%x ", pReq->bRequest); break; } if(RequestOK == FALSE){ DEBUG7("StateIncompatable(%x,%x) ", STATE, ADDRESS ); D12_Stall_Endpt(CTRL_OUT); } } //-------------------------------------------------------- // Service the host's request for a descriptor. // Descriptos are stored end-to-end in a large block of ROM // as the constant 'DESCRIPTORS'. // This block of ROM is searched/parsed to see if it contains // the requested descriptor. void D12_Get_Descriptor(struct REQUEST *pReq){ unsigned int16 ReqDataLen, size; unsigned char i, type, stringCount; ReqDataLen = pReq->wLength; LOAD_LENGTH = 0; // Ensure we don't send unrelated data DEBUG0("GD(%x) ", pReq->wValue >> 8); i = 0; stringCount = 0; while(i < sizeof(DESCRIPTORS)-1){ // Read details from current descriptor size = (unsigned int16) DESCRIPTORS[i]; type = DESCRIPTORS[i+1]; DEBUG0("i=%x(%x, %x) ", i, size, type); if(type == (pReq->wValue >> 8)){ // High byte contains type // Take care of exceptions switch(type){ // Configuration descriptors are expected to be sent with all their subordinate // descriptors. case 0x02: // Configuration descriptor size = (unsigned int16) DESCRIPTORS[i+2]; // wTotalLength low-byte size |= (unsigned int16) DESCRIPTORS[i+3] << 8; // wTotalLength high-byte DEBUG0("*CD(%x) ", size); break; // There can be multiple string descriptors, addressed by index. case 0x03: // String descriptor // Is there a need to try the next string? if( (pReq->wValue & 0x0F) != stringCount){ // Low byte contains index for strings stringCount++; // Note that we've checked a string i = i + size; // Jump to next descriptor in loop continue; // Restart while() loop } break; // Some descriptors do NOT contain bLength and bType bytes, these have been added // by the author to facilitate this parsing approach. Hence we reduce the size by 2 // bytes and increase the LOAD_OFFSET by 2 bytes in such cases. // The artificial bLength value denotes the number of bytes until the next descriptor, // to ensure this code can 'step into' the next descriptor. case 0x22: // Report descriptor i = i + 2; size = size - 2; DEBUG0("*RD(%x) ", size); break; } // Don't transmit more than we need to if( ReqDataLen > size) ReqDataLen = size; // Setup globals for the Ctrl_IN interrupt handler LOAD_OFFSET = i; // Start of descriptor LOAD_LENGTH = ReqDataLen; DEBUG0("Lo=%x Ll=%x ", LOAD_OFFSET, LOAD_LENGTH); break; // Quit while() loop } else { // Types didn't match, try the next descriptor i = i + size; } } if(LOAD_LENGTH == 0){ // We didn't find a match DEBUG7("\x07"); // Bell character (^G) DEBUG7("?DR=%x ",(pReq->wValue >> 8)); // Not sure which endpoint would need to be stalled.. // presumably both as it's a bidirection endpoint, of // sorts D12_Stall_Endpt(CTRL_OUT); D12_Stall_Endpt(CTRL_IN); } else { D12_Handle_Ctrl_In_EP(); // Kick-start descriptor sending } } //-------------------------------------------------------- // When an error code is encountered from a 'Read Last Transaction Command' // this function is called to clean up the mess #SEPARATE void D12_Transaction_Error(int8 error){ DEBUG7("!LT=%x ", error); switch (error) { case 0x02 : //0001 PID Encoding Error break; case 0x04 : //0010 PID Unknown break; case 0x06 : //0011 Unexpected packet break; case 0x08 : //0100 Token CRC Error break; case 0x0A : //0101 Data CRC Error break; case 0x0C : //0110 Time out Error break; case 0x0E : //0111 Never happens break; case 0x10 : //1000 Unexpected End of Packet break; case 0x12 : //1001 Sent or received NAK break; case 0x14 : //1010 Sent Stall, token received Endpt Stalled break; case 0x16 : //1011 Overflow Error break; case 0x1A : //1101 BitStuff Error break; case 0x1E : //1111 Wrong DATA PID break; default : DEBUG7("\x07"); // Bell character (^G) DEBUG7("?LT=%x ", error); break; } } //-------------------------------------------------------- // Output debugging info about a USB request #SEPARATE void Debug_D12_Request(struct REQUEST *pReq){ DEBUG4("DIR="); if(pReq->bmRequestType & REQTYPE_XFER_DIRECTION){ DEBUG4("I "); } else { DEBUG4("O "); } DEBUG4("TO="); switch(pReq->bmRequestType & REQTYPE_RECIPIENT){ // Device case 0x00: DEBUG4("D "); break; // Interface case 0x01: DEBUG4("I "); break; // Endpoint case 0x02: DEBUG4("E "); break; // Other case 0x03: DEBUG4("? "); break; // Unsupported default: DEBUG7("\x07"); // Bell character (^G) // Stall this endpoint (indicating we cannot handle the request) D12_Stall_Endpt(CTRL_OUT); break; } DEBUG4("wV=%Lx ", pReq->wValue); DEBUG4("wI=%Lx ", pReq->wIndex); DEBUG4("wL=%Lx ", pReq->wLength); } //-------------------------------------------------------- // Responds to the Set_Address request of the host, and then // sets the D12 address (NB: The address is changed AFTER the // we respond to the host) void D12_Set_Address(struct REQUEST *pReq){ // Acknowledge token by replying with a null data packet D12_Send_Null_Packet(CTRL_IN); D12_Write(D12_COMMAND, SET_ADDRESS); D12_Write(D12_DATA, (pReq->wValue | 0x80)); ADDRESS = (pReq->wValue | 0x80); // Update our current address STATE = STATE_ADDRESSED; CTRL_IN_BUSY = TRUE; // Unless something else is pending, the next CTRL_IN interrupt just means the data was sent DEBUG3("AS "); } //-------------------------------------------------------- // Send a zero-length packet to the selected endpoint // Useful for empty data stages in setup transactions, as well // as signalling the end of a stream when the last packet was // full (i.e. don't let the host assume there is no more data, // tell it!) void D12_Send_Null_Packet(int8 ENDPT) { D12_Write(D12_COMMAND, SELECT_ENDPT + ENDPT); D12_Write(D12_COMMAND, WRITE_BUFFER); D12_Write(D12_DATA, 0); // First packet is reserved D12_Write(D12_DATA, 0); // Data length (zero-length packet) D12_Write(D12_COMMAND, VALIDATE_BUFFER); CTRL_IN_BUSY = TRUE; DEBUG3("Z "); } //-------------------------------------------------------- // Responds to Set_Confugration request of the host, checks the // requested configuration is supported and responds appropriately with // an ACK or a STALL, and updates the global state variable. void D12_Set_Configuration(struct REQUEST *pReq){ short RequestOK = 1; switch(pReq->wValue & 0x0F){ // Only interested in lower byte //case 0: // // Revert to unconfigured state // STATE = STATE_ADDRESSED; // CONFIGURATION = 0; //break; case 1: STATE = STATE_CONFIGURED; CONFIGURATION = 1; Send_Mouse_Data(); // Kick-start break; default: DEBUG7("!SetC=%x ", pReq->wValue & 0x0F); RequestOK = 0; break; } if(RequestOK){ // Note that the CTRL_IN buffer was cleared in D12_Handle_Ctrl_Out_EP(); D12_Send_Null_Packet(CTRL_IN); } else { // Indicate we don't like this request D12_Stall_Endpt(CTRL_IN); } } //-------------------------------------------------------- // Handle USB class requests void D12_Class_Request(struct REQUEST *pReq) { short RequestOK = TRUE; #define HID_SET_IDLE 0x0a switch(pReq->bRequest){ case HID_SET_IDLE: HID->IDLE_TIME = pReq->wValue >> 8; // High byte D12_Send_Null_Packet(CTRL_IN); break; default: RequestOK = FALSE; DEBUG7("\x07"); // Bell character (^G) DEBUG7("?CREQ=%x ", pReq->bRequest); break; } if(RequestOK == FALSE){ D12_Stall_Endpt(CTRL_OUT); } } //-------------------------------------------------------- // Responsible for sending data in response to setup tokens among other things. // Activties include sending descriptors. #SEPARATE void D12_Handle_Ctrl_In_EP() { unsigned char buffer[2]; // Clear interrupt D12_Write(D12_COMMAND, READ_ENDPT_STATUS + CTRL_IN); D12_Read(buffer, 1); DEBUG1("LT=%x ", buffer[0]); if (LOAD_LENGTH > 0) { unsigned char DataLen, DataEnd; DEBUG5("DR "); // Smaller of "length of data to send" and "buffer size" DataLen = (LOAD_LENGTH > D12_CTRL_BUFFER_SIZE) ? D12_CTRL_BUFFER_SIZE : LOAD_LENGTH; DataEnd = LOAD_OFFSET + DataLen; DEBUG0("DataLen=%x ", DataLen); D12_Write(D12_COMMAND, SELECT_ENDPT + CTRL_IN); D12_Write(D12_COMMAND, WRITE_BUFFER); D12_Write(D12_DATA, 0x00); // First byte is reserved D12_Write(D12_DATA, DataLen); // Num of data bytes for(; LOAD_OFFSET<DataEnd; LOAD_OFFSET++) { DEBUG0("%x ", DESCRIPTORS[LOAD_OFFSET]); D12_Write(D12_DATA, DESCRIPTORS[LOAD_OFFSET]); LOAD_LENGTH--; } D12_Write(D12_COMMAND, VALIDATE_BUFFER); // Mark the buffer as ready to go! // Are we done? if(LOAD_LENGTH == 0){ // Did the last packet fill the buffer completely? if((DataLen % D12_CTRL_BUFFER_SIZE) == 0){ D12_Send_Null_Packet(CTRL_IN); // Explicity signal end of data } } CTRL_IN_BUSY = TRUE; // Unless something else is pending, the next CTRL_IN interrupt just means the data was sent DEBUG2("DS "); } else if (CTRL_IN_BUSY) { // This interrupt is just the D12 telling us it's emptied its buffer (i.e. sent it to the host) CTRL_IN_BUSY = FALSE; } else { // Stall this endpoint (indicating we cannot handle the request) D12_Stall_Endpt(CTRL_IN); } } //-------------------------------------------------------- // Uses compiler directives to make a wrapper for getch(), // that specifically uses seperate pins from the normal // debug statements #SEPARATE char gba_getch(){ #use rs232(baud = 9600, xmit = PIN_C6, rcv = PIN_C7, disable_ints) return getch(); #use rs232(baud = 19200, xmit = PIN_C4, rcv = PIN_C5, disable_ints) } //-------------------------------------------------------- // Interrupt handler for USART hardware data reception #INT_RDA void Handle_UART_Reception() { output_toggle(LED_N); switch(gba_getch()){ case '^': MOUSE->y--; break; case 'v': MOUSE->y++; break; case '<': MOUSE->x--; break; case '>': MOUSE->x++; break; case 'A': MOUSE->a = TRUE; break; case 'B': MOUSE->b = TRUE; break; case 'S': MOUSE->x = 0; MOUSE->y = 0; MOUSE->a = 0; MOUSE->b = 0; break; } } //-------------------------------------------------------- // Fill our main endpoint with our report data void Send_Mouse_Data() { DEBUG1("x%x y%x a%x b%x",MOUSE->x, MOUSE->y, MOUSE->a, MOUSE->b); D12_Write(D12_COMMAND, READ_ENDPT_STATUS + ENDPT2_IN); // Clear interrupt D12_Write(D12_COMMAND, SELECT_ENDPT + ENDPT2_IN); D12_Write(D12_COMMAND, WRITE_BUFFER); D12_Write(D12_DATA, 0x00); // Reserved byte D12_Write(D12_DATA, 0x03); // Data length D12_Write(D12_DATA, 0x00); // Click status D12_Write(D12_DATA, MOUSE->x); // Horizontal status D12_Write(D12_DATA, MOUSE->y); // Vertical status D12_Write(D12_COMMAND, VALIDATE_BUFFER); // Fit to be sent }